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ADM1030
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19
Filtered Mode allows the PWM output to be made less
sensitive to temperature variations. This will be dependent
on the ramp rate selected and the ADC sample rate
programmed into the Fan Filter Register.
Figure 33. How Fan Reacts to Temperature Variation
in Filtered Mode
TIME (s)
0
10
20
30
40
50
70
0
10
20
30
40
50
60
PWM DUTY CYCLE
R
TEMP
60
80
90
70
80
90
Effect of ADC Sample Rate on Filtered Mode
The second means by which to change the Filtered Mode
characteristics is to adjust the ADC sample rate. The faster
the ADC sample rate, the more temperature samples are
obtained per second. One way to apply filtering to the
control loop is to slow down the ADC sampling rate. This
means that the number of iterations of the Filtered Mode
algorithm per second are effectively reduced. If the number
of temperature measurements per second are reduced, how
often the PWM_OUT signal controlling the fan is updated
is also reduced.
Bits <4:2> of the Fan Filter Register (Reg 0x23) set the
ADC sample rate. The default ADC sample rate is 1.4 kHz.
The ADC sample rate is selectable from 87.5 Hz to
11.2 kHz. Table 13 shows how many temperature samples
are obtained per second, for each of the ADC sample rates.
Table 13. TEMPERATURE UPDATES PER SECOND
ADC Sample Rate
Temperature Updates/Sec
87.5 Hz
0.0625
175 Hz
0.125
350 Hz
0.25
700 Hz
0.5
1.4 kHz
1 (Default)
2.8 kHz
2
5.6 kHz
4
11.2 kHz
8
Relevant Registers for Filtered Automatic Fan
Speed Control Mode
In addition to the registers used to program the normal
Automatic Fan Speed Control Mode, the following register
needs to be programmed.
Register 0x23 Fan Filter Register
<7>    Spin-up Disable: when this bit is set to 1, fan
spin-up is disabled. (Default = 0)
<6:5>   Ramp Rate: these bits set the ramp rate for
filtered mode.
00 = 1 (0.416% Duty Cycle Change)
01 = 2 (0.833% Duty Cycle Change)
10 = 4 (1.66% Duty Cycle Change)
11 = 8 (3.33% Duty Cycle Change)
<4:2>   ADC Sample Rate
000 = 87.5 Hz
001 = 175 Hz
010 = 350 Hz
011 = 700 Hz
100 = 1.4 kHz (Default)
101 = 2.8 kHz
110 = 5.6 kHz
111 = 11.2 kHz
<1>    Unused. Default = 0
<0>    Fan 1 Filter Enable: when this bit is set to 1,
it enables filtering on Fan 1. Default = 0.
Programming the Filtered Automatic Fan Speed
Control Loop
1. Program a value for T
MIN
.
2. Program a value for the slope T
RANGE
.
3. T
MAX
 = T
MIN
 + T
RANGE
.
4. Program a value for Fan Spin-up Time.
5. Program the desired Automatic Fan Speed Control
Mode Behavior, i.e., which temperature channel
controls the fan.
6. Program a ramp rate for the filtered mode.
7. Program the ADC sample rate in the Fan Filter
Register.
8. Set Bit 0 to enable fan filtered mode for the fan.
9. Select Automatic Fan Speed Control Mode by
setting Bit 7 of Configuration Register 1.
PWM Duty Cycle Select Mode
The ADM1030 may be operated under software control
by clearing Bit 7 of Configuration Register 1 (Register
0x00). This allows the user to directly control PWM Duty
Cycle.
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